Semiconductor memory device equipped with step-down power voltage supply system for sense amplifier circuit arrays
US5272677A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 9, 1992 |
| Grant date | Dec 21, 1993 |
| Priority date | — |
| Expiry date | Oct 9, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4091
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A dynamic random access memory device includes a plurality of memory cell plates each having memory cells and a sense amplifier circuit array selectively coupled with the memory cells, and the sense amplifier circuit array selectively enters a standby mode and amplifying mode depending upon first and second driving signals supplied thereto, wherein the first and second driving signals are regulated to an intermediate voltage level between a step-down power voltage level and a ground voltage level in the standby mode with a main step-down power voltage signal supplied from a main step-down circuit; however, the first and second driving signals are changed to the step-down voltage level and the ground voltage level with an auxiliary step-down power voltage signal produced from an external power voltage signal at an auxiliary step-down circuit exclusively associated therewith so that undesirable voltage fluctuation hardly takes place on a main step-down power voltage line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.