Semiconductor memory device
US5274585A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 5, 1991 |
| Grant date | Dec 28, 1993 |
| Priority date | — |
| Expiry date | Sep 5, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device includes a plurality of bit lines, a plurality of memory cells connected to the bit line. The semiconductor memory device also includes control circuits, a first control line and a second control line. The control circuit outputs a control signal. The first control line is formed by a first low resistance conductive layer and is connected to the control circuit to transfer the control signal. The first control signal extends to a first direction. A second control line is formed by a second low resistance conductive layer which is separated from the first conductive layer by an insulating layer. The second control line is connected to the control circuit to transfer the control signal and extends to a second direction which is substantially different from the first direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.