High-performance host interface for ATM networks
US5274768A · kind A · utility
159Cited by
6References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 28, 1991 |
| Grant date | Dec 28, 1993 |
| Priority date | — |
| Expiry date | May 28, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5646
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A host interface 1 for an asynchronous transfer mode (ATM) network comprises a Segmenter 2 and Reassembler 3. The host interface 1 is connected to a Sunshine ATM switch 7 via an electrical to optical converter 6 and an IBM RS/6000 workstation 4 via a MicroChannel bus 5. The Reassembler 3 comprises three components, respectively referred to as the Linked List Manager, Dual Port Reassembly Buffer and SONET Interface and VCI Lookup Controller, that are capable of concurrent operation once they are initialized and configured. Those components are capable of reassembling an ATM cell in less than 2.7 microseconds.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.