Peripheral I/O bus and programmable bus interface for computer data acquisition
US5274795A · kind A · utility
38Cited by
20References
16Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 28, 1992 |
| Grant date | Dec 28, 1993 |
| Priority date | — |
| Expiry date | Aug 28, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A bus interfacing device suitable for use in computerized data acquisition systems for interfacing a main processor bus to an auxiliary peripheral bus. The operation of peripherals connected to the auxiliary peripheral bus can be controlled by either the main processor or the bus interfacing device. The device also allows data gathered from peripherals on the auxiliary bus to be stored in a dual-ported RAM for transfer in DMA-type fashion over the main processor bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.