Method for fabricating a semiconductor integrated circuit device including the self-aligned formation of a contact window
US5275972A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 14, 1992 |
| Grant date | Jan 4, 1994 |
| Priority date | — |
| Expiry date | Aug 14, 2012 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/97
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A fabrication method for a semiconductor integrated circuits which permits the self-aligned formation of contact windows without causing shorts or breaks in the interconnecting lines in the device is provided. After forming gate electrodes and source/drain regions of transistors on a semiconductor substrate, an etch-stop layer and a BPSG film are successively deposited over the gate electrodes and the source/drain regions. After a resist having a contact window pattern is formed on the BPSG film, an isotropic dry etching using a microwave plasma is performed to etch the BPSG film. According to the isotropic dry etching, the laterally etching rate in the BPSG film can be controlled by adjusting the RF power, and a silicon dioxide film can be used as the etch stop layer. After the BPSG flow process, the etch stop layer on the contact region is etched away to form contact windows.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.