Process for fair and prioritized access to limited output buffers in a multi-port switch
US5276681A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 25, 1992 |
| Grant date | Jan 4, 1994 |
| Priority date | — |
| Expiry date | Jun 25, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/508
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A process for fairly allocating resources in a multiport packet switch is disclosed. Each port is connected to a station and comprises a transmit FIFO buffer and a receive FIFO buffer. The ports are connected by a broadcast transmission medium. A transmit buffer of a specific port gains access to the transmission medium when the port possesses a token which is passed from port to port in a round-robin fashion. When a port recognizes that a transmitted packet is addressed to it, the port uses a local processor to determine whether or not to accept the packet. The determination is based on (1) information in the packet header, e.g., priority and address of the transmitting port, (2) the status of the receive buffer (full or not), and (3) other locally recorded information regarding past history of the acceptance or rejection of packets from particular ports and of particular priority classes needed to achieve fairness among packets of the same class and priority among different classes. If the receiving port makes a determination to reject a packet, the receiving port issues a busy signal which is transmitted over the broadcast medium. When the transmitting port receives the busy sig…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.