Method of multiple CPU logic simulation
US5276854A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 17, 1990 |
| Grant date | Jan 4, 1994 |
| Priority date | — |
| Expiry date | Aug 17, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/33
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Software simulation of a multiple CPU computer system design utilizes integer type program statements having program variables typed as integer that correspond to the boolean input variables of the design equations. Each of the program variables is assigned to a digital word having at least as many bits as the number of CPUs, with the boolean value of variables for each CPU represented by one of the bits in the word as a binary one or zero. The program statements are executed on a computer and evaluated to provide a result word wherein the individual bits of the result word represent the logic output state of the boolean equation for each CPU.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.