Bus arbitration system for granting bus access to devices following two-wire bus arbitration protocol and devices following three-wire bus arbitration protocol
US5276887A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 6, 1991 |
| Grant date | Jan 4, 1994 |
| Priority date | — |
| Expiry date | Jun 6, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/3602
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A bus arbitration system is capable of granting access to an expansion bus to devices following two-wire bus arbitration protocol or a three-wire bus arbitration protocol. The bus arbitration system receives a plurality of bus request signals from a plurality of devices. Each bus request signal is made up of one or more coded pulses and has a predetermined priority. A priority encoder receives the bus request signal and assigns a priority level to each bus request signal. An arbiter determines and stores in memory which bus request signal has a highest priority and whether the device follows two-wire bus arbitration protocol or a three-wire bus arbitration protocol. The expansion bus grants access to the bus to the device having the highest priority once a previous device if any, has relinquished the bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.