Digital signal processing system
US5278781A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 23, 1993 |
| Grant date | Jan 11, 1994 |
| Priority date | — |
| Expiry date | Apr 23, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2207/3884
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A digital signal processing system includes a plurality of multiplier/accumulators for executing a pipeline processing operation. Each of the plurality of multiplier/accumulators includes a multiplication part and an addition part. The multiplication parts includes N pipeline registers for storing N intermediate outputs of a multiplier. The addition part includes a Wallace tree transformation unit for transforming a sum of N+1 inputs into two transformation outputs, and an adder for adding the two transformation outputs. The N+1 inputs includes the N intermediate outputs from the multiplication part and the one addition output from the adder.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.