State machine for executing commands within a minimum number of cycles by accomodating unforseen time dependency according to status signals received from different functional sections
US5280595A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 5, 1990 |
| Grant date | Jan 18, 1994 |
| Priority date | — |
| Expiry date | Oct 5, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/261
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A virtual memory unit (VMU) includes a state machine for controlling its operations in response to commands received from another unit. The state machine includes a plurality of programmable array logic (PAL) devices which are connected to gather status from the different sections of the unit. The outputs of the devices connect in common and supply a first address input to an addressable state memory. The state memory includes a plurality of locations, each of which stores a binary code defining a different machine state. The state memory locations are accessed as a function of the status signals and current state and used in turn to generate the required subcommands for executing the received commands. The state machine makes it possible to easily classify the received commands to their complexity and urgency in terms of their effect on overall system performance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.