Logic circuit for task processing
US5280616A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 26, 1992 |
| Grant date | Jan 18, 1994 |
| Priority date | — |
| Expiry date | May 26, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a logic circuit having clocked state latches and combinatorial logic for functional processing of a task in response to functional clocking of the state latches, the state latches are additionally interconnected to form a scannable chain of latches, and task switching logic is provided for suspending task processing by interrupting the functional clocking of the state latches and, during such suspension, scanning the state latches such that existing contents of the state latches defining a task state can be saved from the state latches or new contents defining a task state can be loaded into the state latches. The invention provides an efficient means for switching tasks being performed by a logic circuit in a multiprocessing enviornment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.