Processes for manufacturing a semiconductor device
US5281545A · kind A · utility
0Cited by
6References
16Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 30, 1992 |
| Grant date | Jan 25, 1994 |
| Priority date | — |
| Expiry date | Jan 30, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/996
Abstract
A Bi-CMOS ( Bipolar-Complementary Metal Oxide Silicon ) gate array includes bipolar transistors, and P-channel and N-channel MOS transistors all formed on the same single chip in the form of an array. Such a chip may provide desired bipolar and MOS transistor characteristics at the same time by itself.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.