Non-silicon and silicon bonded structure and method of manufacture
US5281834A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 1990 |
| Grant date | Jan 25, 1994 |
| Priority date | — |
| Expiry date | Aug 31, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/2007
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A non-silicon substrate is bonded to a silicon substrate with a stress-relief layer between the non-silicon substrate and the silicon substrate. The stress-relief layer reduces the stress between the non-silicon substrate and the silicon substrate. The stress is created by the difference in the thermal expansion coefficients of the two materials. The stress-relief layer may be a low melting point metal, a semiconductor layer having its thermal expansion coefficient close to the thermal expansion coefficient of the non-silicon substrate. The silicon substrate and/or the non-silicon substrate may have a silicon dioxide layer formed thereon such that the silicon dioxide layer is adjacent to the stress-relief layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.