Flip-flop circuit
US5281865A · kind A · utility
129Cited by
5References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 26, 1991 |
| Grant date | Jan 25, 1994 |
| Priority date | — |
| Expiry date | Nov 26, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/09429
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A flip-flop circuit receives a pair of complementary data signals, then outputs complementary signals corresponding to the pair of complementary data signals. The pair of data signals are also supplied to a driving gate means which outputs a signal corresponding to at least one data signal of the pair of data signals supplied thereto. The driving gate means also comprises at least one try-state gate controlled by a clock signal. An output signal of the driving gate means is held by a memory means, and also outputted as complementary output signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.