Process for manufacturing a ceramic wiring substrate having a low dielectric constant
US5283081A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 10, 1992 |
| Grant date | Feb 1, 1994 |
| Priority date | — |
| Expiry date | Mar 10, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K3/388
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A process for manufacturing a hybrid multilayer ceramic wiring substrate having a low dielectric constant includes a conductor wiring forming step and an insulating layer forming step. The conductor wiring forming step comprises the steps of: applying a photoresist upon a multilayer ceramic wiring substrate in which a plurality of conductor layers are laminated via insulation layers formed of a low temperature sinterable ceramic composition having a low dielectric constant; exposing the photoresist to light and developing the exposed photoresist to form a mask pattern; and selectively plating the mask pattern. The insulating layer forming step comprises the steps of: printing a photo-setting paste for an insulating layer on the substrate and drying the paste; forming a via hole pattern by light exposure and development using a mask; and burying and sintering a conductor paste into via holes. A micro multilayer wiring is formed by a combination of the conductor wiring forming step and the insulating layer forming step, whereby high density micro wiring and high speed transmission are attained.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.