Voltage limiter and single-ended to differential converter using same
US5283484A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 13, 1992 |
| Grant date | Feb 1, 1994 |
| Priority date | — |
| Expiry date | Oct 13, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06G7/25
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A voltage limiter (20) includes a resistor (21) receiving an input signal on a first terminal and providing an output signal on a second terminal, and a capacitor (22) connected between the second terminal of the resistor (21) and ground. Two transistors (23,26) biased by first and second bias voltages, respectively, are connected between the second terminal of the resistor and a second voltage terminal to clamp the output voltage between high and low voltage limits. A single-ended to differential converter (60) uses two such voltage limiters. A first voltage limiter (90) receives an input voltage, and has an output terminal connected to a positive input terminal of an amplifier (100). A second voltage limiter (92) has an input terminal connected to the second voltage terminal and an output terminal connected to a negative input terminal of the amplifier (100). A shared capacitor (83) is coupled between second terminals of resistors of the first (90) and second (92) voltage limiters.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.