Crosstalk reduction circuit for crosspoint matrix
US5287066A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 15, 1992 |
| Grant date | Feb 15, 1994 |
| Priority date | — |
| Expiry date | May 15, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04Q3/521
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A crosstalk reduction circuit compensates for input to output capacitance coupling of each switch of a crosspoint matrix and for output to common level capacitance coupling for each integrated circuit chip that makes up the crosspoint matrix. Each input signal to the crosspoint matrix is capacitively scaled, summed and inverted to produce an "off" isolation compensation signal, and each output signal from the crosspoint matrix is capacitively scaled, summed and inverted to produce an output isolation compensation signal. Each compensation signal is resistively scaled for each output signal, and the scaled compensation signals are subtracted from the output signals to reduce the crosstalk in the output signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.