Bufferless SCSI to SCSI data transfer scheme for disk array applications
US5287462A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 20, 1991 |
| Grant date | Feb 15, 1994 |
| Priority date | — |
| Expiry date | Dec 20, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0673
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An array controller including a novel data path structure for effecting data transfers between a host computer system bus and four array busses associated with a RAID level 3 disk array without the utilization of a buffer between the host system and the array. The data path structure includes a host register associated with each array bus, each host register being connected to the host bus for receiving data therefrom; a first array register associated with each array bus, each first array register being connected to a corresponding host register for receiving data therefrom and connected to its associated array bus for providing data thereto; and a second array register associated with each array bus, each second array register being connected to it associated array bus for receiving data therefrom and connected to the host bus for providing data thereto. A state machine coordinates the operation of the host and array registers to effect RAID level 3 read and write transfers between the host system and four array channels. The state machine includes logic for generating, in response to a write request from the host system, strobe signals for effecting the transfer of data from the…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.