Apparatus and method for coupling a multi-lead output bus to interleaved memories, which are addressable in normal and block-write modes
US5287470A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 28, 1989 |
| Grant date | Feb 15, 1994 |
| Priority date | — |
| Expiry date | Dec 28, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G5/393
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A circuit and method of operation for controlling block-write operations to interleaved memories is disclosed which includes first and second interleave banks of memories, each memory addressable in a normal mode in a block-write mode. Each memory has a plurality of input nodes for receiving data in a normal mode, ones of the input nodes operable to receive data in the block-write mode and other ones of said input nodes not used in the block-write mode. Coupling circuitry couples leads from an output bus to input nodes of the first bank memories which are operable to receive data in the block-write mode and to input nodes in the second bank of memories which are not used in the block-write mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.