Formatter circuit
US5293079A · kind A · utility
9Cited by
15References
9Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 22, 1992 |
| Grant date | Mar 8, 1994 |
| Priority date | — |
| Expiry date | Oct 22, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/037
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A formatter circuit for an integrated circuit tester comprises at least one edge-triggered toggle flip-flop, which may be constituted of an EXOR gate and a D flip-flop. This allows to build an event-driven formatter with broad flexibility and "change timing" capability. The basic toggle flip-flops may be cascaded by further EXOR gates, in order to perform more complex functions and to combine several data input signals or clock signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.