Semiconductor memory device and method for manufacturing the same

US5293336A · kind A · utility

Assignee

• Kabushiki Kaisha Toshiba · JP

Inventors

• Takeaki Ishii · Ooita, JP
• Satoshi Maeda · Tokyo, JP

Key dates

• Filing date: Oct 29, 1991
• Grant date: Mar 8, 1994
• Expiry date: Oct 29, 2011

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/038

Abstract

A semiconductor memory device has a memory cell composed of a select MOS transistor and information storage capacitor and a peripheral circuit composed of a MOS transistor formed at a peripheral side of the memory cell, these transistors being formed in the surface portion of a first conductivity type semiconductor substrate. In the semiconductor memory device, the gate oxide film of the select MOS transistor is different in thickness from the gate oxide film of the MOS transistor of the peripheral circuit, the gate electrodes of these transistors being simultaneously formed.