Multiplication, division and square root extraction apparatus
US5293558A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Jul 3, 1990 |
| Grant date | Mar 8, 1994 |
| Priority date | — |
| Expiry date | Jul 3, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2207/5356
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multiplication, division and square root extraction apparatus which calculates the solutions to addition, division and square root extraction functions by approximation using iteration has a multiplier, an adder-subtracter and a shifter of prescribed bit width connected to a bus. Iteration is conducted by inputting the output of the multiplier to the adder-subtracter or the shifter and returning the result to the input of the multiplier via the bus. A shifter and an arithmetic and logic unit connected to a second bus connected to the aforesaid bus via a switch have a greater bit width than the prescribed bit width and are used for large scale calculations, thus preventing a reduction in processing speed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.