Latching sense amplifier
US5294847A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 1992 |
| Grant date | Mar 15, 1994 |
| Priority date | — |
| Expiry date | Aug 31, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/065
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A latching sense amplifier (10) has sensing circuitry (12 and 14), latching circuitry (16) and switching circuitry (18). The sense amplifier operates between a first and a second voltage supply level and receives two input voltage levels. In a first mode, the sensing circuitry (12 and 14) generates two AC symmetric outputs representative of the voltage differential between the two input voltages. In a second mode, the latching circuitry (16) receives the two AC symmetric outputs and generates a second pair of outputs. The second pair of outputs is also representative of the voltage differential between the two input voltages. The voltage differential between the second pair of outputs is generally equal to the voltage differential between the first and second voltage supply levels. The switching circuitry (18) configures the sensing circuitry (12 and 14) to operate in conjunction with the latching circuitry (16) to form a cross coupled latch in the second mode. The switching circuitry is responsive to a timing signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.