Semiconductor memory device with redundant circuit for rescuing from rejection due to large current consumption
US5295114A · kind A · utility
12Cited by
5References
6Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 15, 1991 |
| Grant date | Mar 15, 1994 |
| Priority date | — |
| Expiry date | Nov 15, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/832
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device has regular memory cells arranged in rows and columns, and at least one of the rows is replaced with redundant memory cells when one of the regular memory cells in the row is defective, wherein a fuse element is broken for isolating a power supply line associated with the row from a main power supply line so that a defective memory cell does not consume any current, thereby improving the power consumption of the semiconductor memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.