Method of manufacturing a static induction field-effect transistor
US5296403A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Oct 23, 1992 |
| Grant date | Mar 22, 1994 |
| Priority date | — |
| Expiry date | Oct 23, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/85
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device comprises a vertical MIS-SIT which has a smaller source-to-drain distance for operation at ultra-high speed. The semiconductor device has a substrate crystal for epitaxial growth thereon, least two semiconductor regions of different conductivity types deposited by way of epitaxial growth on the substrate crystal according to either metal organic chemical vapor deposition (MO-CVD) or molecular layer epitaxy (MLE), thereby providing a source-drain structure, a gate side formed by etching the semiconductor regions of the source-drain structure, the gate side comprising either a (111)A face or a (111)B face, and a semiconductor region deposited as a gate by way of epitaxial growth on the gate side according to either MO-CVD or MLE.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.