Patent · US Expired

CMOS low power mixed voltage bidirectional I/O buffer

US5300835A · kind A · utility

120Cited by

10References

30Claims

0Family size

Assignee

CIRRUS LOGIC, INC. · US

Inventors

Mahmud Assar · Capitola, US
Prakash C. Agarwal · San Jose, US
Vlad Bril · Campbell, US

Key dates

Filing date	Feb 10, 1993
Grant date	Apr 5, 1994
Priority date	—
Expiry date	Feb 10, 2013

Classification

Technology area (CPC H)Electricity
CPC primaryH03K2217/0018
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

This invention describes the design and implementation of a low power CMOS bidirectional I/O buffer that translates low voltage core logic level signals into the highest logic level signals to drive the final output stage which outputs a selectable logic level signal. The invention further translates input signals of a variety of logic levels into low voltage core logic level signals. In either case, AC and DC power consumption is minimized in a mixed power supply environment that requires voltage translation to represent the proper binary logic levels.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.