Digital filter circuit for use in oversampling type analog/digital converter
US5301134A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 30, 1992 |
| Grant date | Apr 5, 1994 |
| Priority date | — |
| Expiry date | Jan 30, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H2218/10
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital filter circuit has two decimation filters, a first and a second, for performing two decimations with respect to a digital data of a predetermined sampling rate. The first decimation filter has a function of producing processing signals for a filter coefficient of the second decimation filter and providing such operational signal to the second decimation filter. Since the output of the first decimation filter is not a coded numeral value but is an output in the form of a processing signal for the filter coefficient of the second decimation filter, the first decimation filter can take the form of a decoder circuit and not an operational circuit and the second decimation filter can be simpler than that having a multiplier circuit of a conventional circuit. The scale of the overall circuit can be reduced and this contributes in the enhancement of high integration of large scale integrated circuits (LSIs), in the scaling down of chip areas and in reducing the manufacturing cost.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.