Delay distortion suppressing system for ATM communication system
US5301193A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 14, 1991 |
| Grant date | Apr 5, 1994 |
| Priority date | — |
| Expiry date | Nov 14, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5649
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A delay distortion suppressing system is for use in an asynchronous transfer mode communication system which includes at least a transmitting end and a receiving end which are connected via transmission paths. The delay distortion suppressing system includes a first part provided in the transmitting end for transmitting information in the form of cells in an asynchronous transfer mode, a second part provided in the receiving end for delaying each cell which is received via a transmission path by a predetermined delay time relative to a reference point, a third part provided in the receiving end for varying the reference point depending on an arrival time of the cell which is received at the receiving end via the transmission path, so that a delay distortion of the cells is suppressed, and a fourth part including a decoding part for decoding the cells output from the second part.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.