Test apparatus and process for digital data service system
US5301207A · kind A · utility
17Cited by
5References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 3, 1992 |
| Grant date | Apr 5, 1994 |
| Priority date | — |
| Expiry date | Apr 3, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B3/46
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Loop circuits lacking byte alignment are tested by test equipment signals at 9.6 kbps transmitted over a DS.phi. format 19.2 kbps communication network. Upon indication of loss of 19.2 kbps framing, return signals from the loop are reformatted into a 9.6 kbps format by selecting proper return bytes using a logic system stored in an office channel unit (OCU).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.