Voltage controlled oscillator operating with digital controlled loads in a phase lock loop
US5304955A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 19, 1992 |
| Grant date | Apr 19, 1994 |
| Priority date | — |
| Expiry date | Nov 19, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/191
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A phase lock loop operates independent of temperature and process variation by digitally loading a VCO until reaching the desired operating frequency. The VCO reaches a high output frequency even under worst case processing by controlling multiple current mirrors to increase inverter switching current without slowing the response of the VCO to changes in loop node voltage. An Initialize-to-VDD circuit sets the loop node voltage to V.sub.DD so that the load control circuit need only increase loading to slow down the VCO to the desired operating frequency. A frequency range detector monitors the output frequency of the VCO and passes control signals to a load control circuit to activate digital loads and slow down the VCO to the desired operating frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.