Process for preparing a polycrystalline semiconductor thin film transistor
US5306651A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 10, 1991 |
| Grant date | Apr 26, 1994 |
| Priority date | — |
| Expiry date | May 10, 2011 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/091
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for preparing a polycrystalline semiconductor thin film transistor wherein a non-singlecrystalline semiconductor formed on a transparent insulating substrate is annealed by laser beams, such process comprising forming a gate insulation layer and a gate electrode on the non-singlecrystalline semiconductor; implanting impurity ions into a source-drain region of the semiconductor wherein the gate electrode is used as a mask, and irradiating laser beams from the rear surface side of the transparent insulating substrate to thereby polycrystallize the non-singlecrystalline semiconductor under the gate electrode or improve the crystallinity of the semiconductor without causing the non-singlecrystalline semiconductor in a completely molten state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.