Lead arrangement for integrated circuits and method of assembly
US5307929A · kind A · utility
44Cited by
5References
25Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 16, 1992 |
| Grant date | May 3, 1994 |
| Priority date | — |
| Expiry date | Sep 16, 2012 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49222
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A lead arrangement is provided having a number of leads to be mechanically and electrically connected to a substrate. Retaining means are also provided integral with the lead arrangement to hold the substrate against the leads, as during soldering. The retaining means may be disengaged from the substrate separately or simultaneously with the trimming of the leads from the lead arrangement after connecting to the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.