Semiconductor memory device
US5308781A · kind A · utility
12Cited by
1References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 13, 1993 |
| Grant date | May 3, 1994 |
| Priority date | — |
| Expiry date | Jan 13, 2013 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/981
Abstract
A semiconductor memory device comprising a substrate, a longitudinal source diffusion layer for a plurality of memory transistor source regions continuously formed on the substrate, and a longitudinal drain diffusion layer for a plurality of memory transistor drain regions continuously formed on the substrate in parallel to the source diffusion layer. A word line is formed crossing over the diffusion layers. And an electrically insulating film is interposed between the word line and the diffusion layers. The insulating film is thicker than a gate oxide film formed between the diffusion layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.