Low inductance lead frame for a semiconductor package
US5309019A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 26, 1993 |
| Grant date | May 3, 1994 |
| Priority date | — |
| Expiry date | Feb 26, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A low inductance lead frame (10) is formed to have a die attach area (11). A plurality of intermediate connection bars (12,13,14,15) are positioned to be parallel to sides of the die attach area (11), and to be in a plane that is displaced perpendicularly from the die attach area (11). Each end of each intermediate connection bar is separated from an end of each other intermediate connection bar. Supports (17) extend from the die attach area (11) to the intermediate connection bars (12,13,14,15) to provide support for the intermediate connection bars 12,13,14,15). A plurality of leads (19,33,34) are positional in a plane and have a proximal end near the intermediate connection bars (12,13,14,15).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.