Method of and apparatus for designing circuit block layout in integrated circuit
US5309371A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 26, 1990 |
| Grant date | May 3, 1994 |
| Priority date | — |
| Expiry date | Jun 26, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/392
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
There are provided a method of and an apparatus for designing a circuit block layout in an integrated circuit wherein minimization of a total wiring length among the circuit blocks and compaction of the circuit blocks are automatically achieved upon automatically laying out the circuit blocks and determining wiring among those circuit blocks, by initially laying out the circuit blocks using a spring model of a mass point system where circuit blocks with no size are coupled through springs, configuring at least partial circuit blocks as circles to re-lay out the circuit blocks such that there is eliminated any overlapping among the circuit blocks, compacting the external shape of an assembly of the circuit blocks by matching the external shape with the frame of a die and altering the shape of each circuit block from the circle to an actual shape.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.