System and method for determining routes between circuit blocks of a programmable logic device by determining a load pin which is closest to the center of gravity of a plurality of load pins
US5309372A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 16, 1990 |
| Grant date | May 3, 1994 |
| Priority date | — |
| Expiry date | Jul 16, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/394
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for automatically and optimally determining a route to be wired in a Programmable Logic Device (PLD) are disclosed in which a plurality of load pins to be wired with a source pin are selected sequentially according to a shortest length of distance from the source pin to the respective load pins, a plurality of switching stations present midway through each route of paths are selected on the basis of coordinates of a center of gravity derived from the coordinates of the unwired load pins and distances to the respective load pins to be wired sequentially, and, thus, a line network constituted by the routes of the first and second paths is formed. Furthermore, the route is corrected by searching out any of problematic switching stations through which the path cannot be formed from among the switching stations present along the route so as to bypass the problematic switching station. If this correction proves impossible, a second correction is sought by searching the problematic switching station itself so as to bypass a wired path present within the problematic switching station. If this correction also fails, a third mode of correction is implemented in which a sw…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.