Symmetrical polarization enhancement in a ferroelectric memory cell
US5309391A · kind A · utility
35Cited by
7References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 2, 1992 |
| Grant date | May 3, 1994 |
| Priority date | — |
| Expiry date | Oct 2, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A two-transistor, single capacitor ferroelectric memory cell in which a stepped voltage is applied to the drive line for writing polarization states into the capacitor. The isolation transistors are driven into cut off during the intermediate voltage level of the drive line, thereby isolating the ferroelectric capacitor plates with a balanced voltage to enhance full polarization of the ferroelectric domains, irrespective of the polarization state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.