Redundant decoder circuit
US5311472A · kind A · utility
15Cited by
1References
5Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 13, 1991 |
| Grant date | May 10, 1994 |
| Priority date | — |
| Expiry date | Sep 13, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/832
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A redundant decoder circuit includes a restoration circuit for restoring a decoder which activates a redundant memory cell. When the redundant memory cell which should store a predetermined information is disabled, the restoration circuit stops the decoder from supplying the active signal to the disabled memory cell. Therefore, the predetermined information is to be stored in another memory cell instead of the disabled memory cell, so that the redundant memory cell is used effectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.