Circuit for generating a stretched clock signal by one period or one-half period
US5313108A · kind A · utility
12Cited by
5References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 17, 1992 |
| Grant date | May 17, 1994 |
| Priority date | — |
| Expiry date | Apr 17, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The time a microprocessor CPU must wait for memory access is controlled to be one of two values by stretching the CPU clock signal either a first time duration or a second time duration, depending on the expected delay caused by the memory access. The clock stretching is in increments of one quarter of the CPU clock period and is done with both the leading and trailing edges of the clock pulse.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.