System having fixedly priorized and grouped by positions I/O lines for interconnecting router elements in plurality of stages within parrallel computer
US5313590A · kind A · utility
70Cited by
19References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 5, 1990 |
| Grant date | May 17, 1994 |
| Priority date | — |
| Expiry date | Jan 5, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/17393
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A network and method for interconnecting a plurality of router elements in a parallel computer. The network forms a routing system for routing data from source processing elements to destination processing elements. The input lines and output lines of each router chip are prioritized. Higher priority output lines from a given output group of a first routing element are connected to low priority input lines of a second routing element and lower priority output lines from the output group of the first rotating element are connected to higher priority input lines of the second routing element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.