Programmable wait states generator for a microprocessor and computer system utilizing it
US5313621A · kind A · utility
12Cited by
10References
5Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 22, 1993 |
| Grant date | May 17, 1994 |
| Priority date | — |
| Expiry date | Mar 22, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3869
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electronic circuit employed in a microprocessor system inserts a programmable number of wait states in a machine cycle of the microprocessor in response to a specific operational code of the microprocessor's instruction set being detected on a system data bus. A particular application of the wait state generation circuit is to provide enough time for a control signal to propagate along a plurality of daisy-chained peripherals before the microprocessor machine cycle ends. The wait state generation circuit may be provided as part of the microprocessor on a single integrated circuit chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.