Minimum time delay filtering method for automatic voltage regulators
US5315229A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 30, 1991 |
| Grant date | May 24, 1994 |
| Priority date | — |
| Expiry date | Sep 30, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02P2101/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An automatic voltage regulator senses and controls the terminal voltage of a separately excited generator by controlling the field current applied to the field winding. In order to improve the response time of the circuit, the circuitry relies on the phasor relationships between the generator phase voltages to obviate the need for a rectification and filtering circuit, used in known AVR's. More specifically, each of the sinusoidal phase voltages is sampled and squared. The squared phase voltages are then summed together. The square root of the sum is used to provide a DC voltage signal, proportional to the terminal phase voltages V.sub.A, V.sub.B and V.sub.C. The DC voltage signal may then be compared with a reference signal to generate an error signal for use in regulating the generator terminal voltage by controlling the field current applied to the generator field winding.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.