Semiconductor memory device and a manufacturing method thereof
US5315543A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 12, 1992 |
| Grant date | May 24, 1994 |
| Priority date | — |
| Expiry date | May 12, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/37
Abstract
A semiconductor memory device includes a single crystalline semiconductor substrate having a main surface, a plurality of active regions formed at the main surface, and an isolation region which is formed at the main surface and isolates the active regions from one another. Each of the active regions has a transistor region and a capacitor region. The capacitor region has a trench formed in the single crystalline semiconductor substrate. An inner wall of the trench is covered with an insulating layer. At least a portion of the transistor region and the insulating layer are both covered with a semiconductor layer. A portion of the semiconductor layer which covers at least the portion of the transistor region is an epitaxial layer. A portion of the semiconductor layer which covers the insulating layer is a polycrystalline layer, which functions as a storage node of a capacitor. A semiconductor memory device is manufactured by forming an isolation region for isolating a plurality of active regions from one another at a main surface of a single crystalline semiconductor substrate, forming a trench in at least a portion of the active regions of the single crystalline semiconductor subst…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.