Memory controller for nonvolatile RAM operation, systems and methods
US5315549A · kind A · utility
33Cited by
5References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 11, 1991 |
| Grant date | May 24, 1994 |
| Priority date | — |
| Expiry date | Jun 11, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory controller for supplying backup battery power when a main power supply voltage drops together with programmable plus power fail write protection. The controller includes supravoltage induced sleep mode operation, MOS switching between backup batteries during backup operation based on battery voltage levels and discharge circuitry for battery disposal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.