Substrate noise coupling reduction for VLSI applications with mixed analog and digital circuitry
US5317183A · kind A · utility
20Cited by
1References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 3, 1991 |
| Grant date | May 31, 1994 |
| Priority date | — |
| Expiry date | Sep 3, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/00
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The internal electrical noise generated by circuits of a VLSI chip is controlled by separating the logic circuit substrate contacts from the logic circuits ground contacts. A separate return path interconnects each contact to card ground. Further noise reduction is achieved by providing a void region between the noise generating devices and the "quiet" devices. A substrate contact ring is provided in the void region. The substrate contact ring is connected by a separate path to card ground.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.