Patent · US Expired

Integrated circuit employing inverse transistors

US5317208A · kind A · utility

2Cited by
7References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 12, 1992
Grant dateMay 31, 1994
Priority date
Expiry dateMay 12, 2012

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K19/086
  • WIPO fieldControl
  • WIPO sectorInstruments

Abstract

Relatively constant current sources and current mirrors are formed with vertical bipolar transistors operated in the inverse mode. In one embodiment of the invention, an integrated circuit current mirror includes a dual collector vertical NPN bipolar transistor having first and second regions of one conductivity type defining first and second collector regions, respectively, formed within a common third region of opposite conductivity type defining the base of the transistor. The third region is formed within a fourth region defining the emitter of the transistor. The structure of the dual collector vertical transistor is very compact since the two collectors share the same base region which is embedded in a common emitter (inverse collector) pocket. The "inverse" mode vertical transistor can function as a relatively constant current source with a voltage drop (VCEi) across its collector-to-emitter which is substantially less than that of a bipolar transistor operated in a normal mode. Transistors embodying the invention may be used to provide relatively constant current sources to numerous utilization means, such as logic or analog circuits. Due to the low VCEi of the "inverse" mo…

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.