Internally excited, controlled transformer saturation, inverter circuitry
US5317497A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 18, 1992 |
| Grant date | May 31, 1994 |
| Priority date | — |
| Expiry date | May 18, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M7/53835
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An inverter circuit for providing an AC driver voltage for a capacitive load from a DC input voltage. The circuit uses a pair of balanced transistors supplying a split primary winding of a transformer, a feedback winding thereof being coupled thereto to supply a feedback signal to the transistor inputs. Resistors are used to optimize inverter efficiency by adjusting transformer saturation and the DC bias of the drive transistors. A capacitor is connected across the two primaries to provide harmonic suppression an aid in starting the inverter. A second capacitor, connected from base to collector of the transistors opposite the transistor with DC bias being introduced, provides suppression of undesirable high frequencies which will occur if this capacitor is not present. The AC output is supplied from the secondary winding of the transformer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.