Multiprocessor system and interruption control device for controlling interruption requests between processors and peripheral devices in the multiprocessor system
US5317747A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 7, 1991 |
| Grant date | May 31, 1994 |
| Priority date | — |
| Expiry date | Mar 7, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An interruption control device for controlling interruption requests in a multiprocessor system having a plurality of processor elements and a plurality of peripheral devices. The interruption control device is connected between the processor elements and the peripheral devices. The interruption control device includes a plurality of interruption request registers for indicating the occurrence of an interruption request from either a processor element or a peripheral device to a processor element and a plurality of interruption enable registers for authorizing an interruption request of a processor element. The interruption request registers are read by the processor element being interrupted to identify the source of the interruption request.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.