Method of manufacture of multilayer circuit board
US5317801A · kind A · utility
94Cited by
6References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 29, 1993 |
| Grant date | Jun 7, 1994 |
| Priority date | — |
| Expiry date | Jan 29, 2013 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for the manufacture of a multilayer printed circuit board on which integrated circuit chips may be directly mounted includes producing holes at predetermined locations to enable electrical connections between a chip and conductive layers of the circuit board to be established via the holes. Electrically conductive bump members, which protrude outwardly from the circuit board, are formed in registration with the holes. The bump members cooperate with an electrically conductive plating layer or filler that is deposited so as to be in intimate contact with a conductive layer(s) exposed during the production of each hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.