Semiconductor nonvolatile memory with wide memory window and long data retention time
US5319229A · kind A · utility
Inventors
Key dates
| Filing date | Apr 27, 1992 |
| Grant date | Jun 7, 1994 |
| Priority date | — |
| Expiry date | Apr 27, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/693
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor Nonvolatile memory. The memory cell has the following structure. Within a P type silicon substrate 3, there are provided an n.sup.+ type source 26 and an n.sup.+ type drain 28, the two regions forming a channel region 30. On top of the channel region 30 there are laminated a silicon dioxide film 5, an insulating layer which consists of the nitride film 18a,18b and 18c, and the oxide film 20a,20b and 20c. Further, on top of the insulating layer, there is formed a polysilicon film 24, which serves as a control electrode. By using the memory cell and row select transistor a semiconductor nonvolatile memory can be constructed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.